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K2 Space Corporation

Principal ASIC Design Verification Engineer

K2 Space Corporation

. Verify the functionality, performance, and robustness of custom silicon designs .

Posted 11/12/2026full-timeRemote • United StatesLead💰 $190,000 - $285,000 per yearWebsite

Core Competencies

Role fit
Core Competencies

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Expertise in ASIC/SoC verification, including SystemVerilog, UVM testbench development, and regression management. Proficient in simulation tools and methodologies, with a strong focus on functional coverage and post-silicon validation.

Highest-signal resume keywords
ASIC/SoC VerificationSystemVerilog/UVM Testbench DevelopmentSimulation Tools ProficiencyRegression ManagementPost-Silicon Validation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
SystemVerilogUVMDigital LogicRTL DesignDFTFunctional CoverageConstrained-Random TestingAssertionsTest PlanningReference Model Development
Soft Skills
CollaborationProblem-SolvingRoot-Cause AnalysisLeadership
Tools & Technologies
VCSXceliumQuestaVerdiSimVisionPythonPerlTCLGitCI/CD Automation
Industry Keywords
Silicon ValidationPost-Silicon ValidationLow Power VerificationEmbedded Processor-Based DesignsAPBAHBAXISpace SystemsTelecomRF/Digital Mixed Systems

Tech Stack

Tools & technologies
PerlPythonC++

About the role

Key responsibilities & impact
  • Verify the functionality, performance, and robustness of custom silicon designs
  • Define the verification approach and contribute to verification methodology
  • Develop and execute verification plans for block-level, subsystem-level, and full-chip environments
  • Build SystemVerilog/UVM test benches with agents, monitors, scoreboards, checkers, and coverage models
  • Write SystemVerilog Assertions and integrate formal verification where appropriate
  • Drive constrained-random and directed testing strategies for functionality, corner cases, and stress scenarios
  • Run simulations, triage failures, perform root-cause analysis, and collaborate with RTL designers to resolve issues
  • Implement and maintain functional, code, and assertion coverage and ensure coverage closure for sign-off
  • Manage regression testing, simulation farms, and CI pipelines
  • Participate in design reviews, microarchitecture discussions, and design-for-verification best practices
  • Collaborate with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers
  • Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis
  • Participate in ASIC team interviews
  • Advance DV methodologies and improvements
  • Manage external IP providers and verification partners when needed
  • Lead large and/or complex systems
  • Help shape first-generation silicon at K2 Space, which builds high-power satellites for commercial and U.S. government customers

Requirements

What you’ll need
  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field
  • 10+ years of experience in ASIC/SoC verification
  • Solid understanding of SystemVerilog, digital logic, RTL design, DFT, and hardware design and verification flows
  • Proficiency with simulation tools including VCS, Xcelium, and Questa
  • Proficiency with waveform debug tools including Verdi and SimVision
  • Proficiency with coverage tools and scripting languages such as Python, Perl, and TCL
  • Experience with test planning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions
  • Experience with regression management, coverage analysis, revision control such as Git, CI/CD automation, and gate-level simulation
  • Experience developing and integrating reference models
  • Experience with embedded processor-based designs and firmware/bare metal coding such as C and C++
  • Understanding of industry-standard interfaces such as APB, AHB, and AXI
  • Involvement in post-silicon validation planning and execution
  • The hired person must be a U.S. person as defined by ITAR or otherwise eligible for a federally issued export control license
  • Experience with low power verification, analog behavioral models, physical design flows, geographically distributed teams, and space, telecom, or RF/digital mixed systems is listed as nice to have

Benefits

Comp & perks
  • Equity in the company
  • Paid time off
  • Medical, dental, and vision coverage
  • Life insurance
  • Paid parental leave
  • Comprehensive benefits package
  • Many other perks
  • Reasonable accommodation for employment applications or interviews