K2 Space Corporation

Mechanical Engineer

• Develop high-performance RF and millimeter-wave integrated circuits for next-generation satellite communication systems
• Own MMIC designs from architecture and technology selection through tapeout, characterization, and product integration
• Design and develop power amplifiers, low-noise amplifiers, and RF switches in GaAs and GaN technologies
• Manage schematic design, layout, electromagnetic simulation, tapeout, and silicon/MMIC characterization
• Optimize circuits for output power, efficiency, linearity, noise figure, bandwidth, gain, and robustness
• Perform RF and electromagnetic simulations of passive structures, matching networks, interconnects, and package/interface effects
• Develop test plans and characterize MMICs using RF and millimeter-wave laboratory equipment
• Correlate measured performance with simulation and drive design improvements
• Collaborate with RF systems, antenna, packaging, and transceiver IC teams on interfaces and system-level integration
• Contribute to technology evaluation, architecture trades, design methodology, and development of MMIC capabilities from the ground up

Senior MMIC Design Engineer

• Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints
• Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability
• Define long-term packaging roadmap aligned with future ASIC nodes, bandwidth scaling, and multi-die integration
• Establish organizational package design standards, methodologies, and best practices
• Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content
• Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning
• Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces
• Own package-level SI/PI strategy, including high-speed digital interfaces, PDN design, and decoupling strategy
• Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling
• Manage relationships with external packaging vendors, substrate suppliers, and OSATs, including vendor qualification, capability assessment, contract negotiation, and performance/quality score carding
• Drive material selection, substrate technology choices, and assembly process optimization

Principal ASIC Package Design Engineer

• Implement advanced ASIC package architecture with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions
• Support end-to-end package strategy for high-performance mixed-signal and digital SoCs from early architecture and trade studies through vendor engagement, qualification, and production ramp
• Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints
• Lead package-level trade studies across cost, performance, power integrity, signal integrity, thermal, manufacturability, and reliability
• Establish package design standards, methodologies, and best practices
• Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content
• Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning
• Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces
• Support package-level SI/PI strategy, including high-speed digital interfaces, power delivery network design, and decoupling strategy
• Lead package-level thermal architecture, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling
• Manage relationships with external packaging vendors, substrate suppliers, and OSATs
• Drive material selection, substrate technology choices, and assembly process optimization

Senior ASIC Package Design Engineer

• Architect and design high-speed, wideband ADCs and DACs for demanding RF and mixed-signal applications
• Lead converter architecture selection and trade studies balancing bandwidth, sampling rate, resolution/ENOB, linearity, power, area, and implementation risk
• Design wideband analog front-ends, including ADC input networks, track-and-hold/sampling circuits, DAC output stages, references, biasing, clocking, and calibration circuitry
• Develop high-performance circuits in advanced FinFET CMOS technologies
• Own designs from concept and behavioral modeling through transistor-level implementation, layout, verification, and silicon characterization
• Develop calibration and correction techniques and collaborate with DSP/systems engineers on mixed-signal algorithms
• Define converter specifications and interfaces with systems, RF, digital, package, and verification teams
• Drive converter integration into complex mixed-signal SoCs, including power, clocking, signal integrity, and physical implementation considerations
• Establish data-converter design methodologies, IP, simulation infrastructure, and best practices
• Provide technical leadership and mentorship to analog and mixed-signal engineers

Principal Mixed-Signal Design Engineer, Data Converters

Engineer

• Own post-silicon validation strategy, test planning, execution, coverage, and sign-off
• Lead first-silicon bring-up across power, clocks, debug interfaces, processor/memory subsystems, peripherals, and high-speed interfaces
• Define validation strategy and readiness criteria for product integration
• Ensure silicon, firmware, test infrastructure, and system interfaces are ready for integration
• Own system-level functional, performance, stress, and corner-case testing
• Build the test and validation lab, including equipment, infrastructure, test setups, and automated characterization and regression environments
• Characterize RF chains, PLLs, ADCs/DACs, clocking, and power with RF/analog and mixed-signal designers
• Validate DSP and calibration algorithms on silicon and correlate measured performance with models and simulations
• Partner with FPGA, firmware, RTL/DV, hardware, and systems teams to accelerate bring-up and drive end-to-end validation
• Drive cross-functional debug across silicon, firmware, RTL, package, board, and system boundaries
• Build reusable automation for instrumentation control, data collection, analysis, regression, and reporting
• Drive silicon issues from discovery through root cause, workaround, and resolution

Senior MMIC Design Engineer

Principal ASIC Package Design Engineer

Senior ASIC Package Design Engineer

Principal Mixed-Signal Design Engineer, Data Converters

Senior Post-Silicon Validation Engineer