RTL Design Engineer, Networking, NoC

OpenAI

. Design and implement high-performance RTL for next-generation AI accelerator silicon from microarchitecture definition through implementation and integration .

Posted 11/10/2026full-timeSan Francisco • California • United StatesMid-LevelSenior💰 $287,000 - $485,000 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in ASIC RTL Design and Microarchitecture Development, with a strong focus on optimizing performance, power, and area for AI workloads. Proficient in collaborating across architecture, software, verification, and physical design teams to ensure functional correctness and efficient hardware implementations.

Highest-signal resume keywords

ASIC RTL DesignSystemVerilogMicroarchitecture DevelopmentHardware/Software Co-DesignSynthesis and Timing Closure

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

RTL DevelopmentDigital Hardware DesignPerformance OptimizationControl Logic DesignDatapath DesignVerification StrategiesDebugging Complex DesignsNetwork-on-Chip (NoC)Packet-Based ArchitecturesHigh-Bandwidth Data Movement

Soft Skills

CollaborationProblem SolvingCommunication

Industry Keywords

AI AcceleratorsHigh-Performance ComputingMicroarchitectural TradeoffsResource UtilizationExport-Control Legal Status

About the role

Key responsibilities & impact

Design and implement high-performance RTL for next-generation AI accelerator silicon from microarchitecture definition through implementation and integration
Collaborate with architecture and software teams to translate system-level requirements into efficient hardware microarchitectures
Drive hardware/software co-design to optimize performance, power, area, and scalability for AI workloads
Develop and optimize RTL for complex datapaths, control logic, interconnects, and critical silicon subsystems
Evaluate architectural and microarchitectural tradeoffs across bandwidth, latency, throughput, and resource utilization
Partner with design verification and formal verification teams to ensure functional correctness, develop verification strategies, and debug complex design issues
Work with physical design teams to optimize RTL for synthesis, timing closure, power, and area
Contribute to architecture reviews, design specifications, and cross-functional discussions
Support block-level and SoC-level integration, debugging, and performance optimization

Requirements

What you’ll need

Strong hands-on experience with ASIC RTL design and microarchitecture development using SystemVerilog or Verilog
Experience designing and implementing complex digital hardware blocks from architecture and specification through RTL development and verification
Understanding of hardware architecture and microarchitecture tradeoffs, including performance, power, area, latency, and throughput
Experience collaborating across architecture, software, verification, and physical design teams
Ability to reason about complex hardware systems, identify performance bottlenecks, and translate architectural requirements into efficient RTL implementations
Experience with synthesis, timing closure, and physical implementation considerations
Experience with Network-on-Chip (NoC), networking, interconnect fabrics, packet-based architectures, or high-bandwidth data movement systems
U.S. export-control legal status requirements may apply
Experience with AI accelerators, high-performance computing, or hardware/software co-design is a plus

Benefits

Comp & perks

Equity
Performance-related bonus(es) for eligible employees
Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts
Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)
401(k) retirement plan with employer match
Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents)
Paid medical and caregiver leave (up to 8 weeks)
Flexible PTO for exempt employees and up to 15 days annually for non-exempt employees
13+ paid company holidays
Multiple paid coordinated company office closures throughout the year for focus and recharge
Paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)
Mental health and wellness support
Employer-paid basic life and disability coverage
Annual learning and development stipend
Daily meals in offices, and meal delivery credits as eligible
Relocation support for eligible employees
Charitable donation matching
Wellness stipends
Immigration and sponsorship support may be provided based on individual circumstances