Senior Firmware Engineer

Supermicro

. Responsible for FPGA/CPLD firmware design .

Posted 11/2/2026full-timeChungho • TaiwanSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in FPGA/CPLD firmware design and development, with proficiency in C/C++ and Verilog. Capable of collaborating with hardware teams and optimizing performance for AI server products while adhering to DMTF standards.

Highest-signal resume keywords

FPGA/CPLD Firmware DesignC/C++ ProgrammingVerilog DevelopmentDMTF Standards ExpertiseLattice Development Environment

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Firmware DevelopmentMicrocontroller DesignBMC Firmware DevelopmentPerformance OptimizationTest and Debug EnvironmentsServer System ImplementationProject DevelopmentCode InstrumentationCPLD/FPGA VerificationInnovative Design Implementation

Soft Skills

CollaborationCommunication

Tools & Technologies

Lattice FPGA Design FlowIntel FPGA Design FlowXilinx FPGA Design Flow

Industry Keywords

AI Server ProductsODM CollaborationUtility MaintenanceProject AccelerationDMTF Standards

Tech Stack

Tools & technologies

C++

About the role

Key responsibilities & impact

Responsible for FPGA/CPLD firmware design
Design, implement, and deliver innovations for AI server products
Instrument code to optimize performance
Design and develop microcontroller and BMC firmware
Work closely with the HW team, ODMs, and vendors
Maintain utility to meet internal requirements
Implement and verify Server System CPLD/FPGA
Build Verilog IP/Module and test bench environments to accelerate project development
Use Lattice, Intel, or Xilinx FPGA design flows for next-generation projects
Maintain existing projects and develop new projects
Develop test and debug environments to accelerate project debugging and production

Requirements

What you’ll need

Bachelor's degree in computer systems engineering, electrical engineering or equivalent engineering degree
Minimum 5+ years of related experience and/or training in firmware development
Proficient in C/C++ and Verilog
Expertise in DMTF Standards (MCTP, SPDM, and PLDM) is a plus
Experience with the Lattice Development Environment is a plus