AscendArc

Software Engineer

• Architect, write, and verify synthesizable RTL in SystemVerilog or VHDL for modern FPGAs
• Integrate and configure modulation, demodulation, and packet-switching/routing IP cores
• Implement DSP blocks including FIR/CIC/polyphase filters, NCOs, mixers, decimation/interpolation chains, channelizers, and demodulation/synchronization logic
• Develop simulation testbenches using UVM, cocotb, or similar tools
• Drive functional and code coverage and own hardware bring-up
• Take designs through synthesis, place-and-route, and timing closure
• Analyze utilization, congestion, and Fmax issues and resolve them at the RTL level
• Integrate ADC/DAC front-ends and mixed-signal interfaces, including clocking, calibration, and lane alignment
• Collaborate with systems, firmware, and hardware engineers on interface definitions and hardware/software partitioning
• Produce design documentation, interface control documents, and verification reports
• Influence technical direction and help shape communications architecture for next-generation spacecraft

Explore FPGA Developer at AscendArc. Review requirements and application details.

Open roles

FPGA Developer