EdgeCortix

Mechanical Engineer

• Develop and execute SoC RTL design, integration, and related RTL design checks
• Participate in and contribute to architecture discussions
• Work with DFT, Verification, and Physical Design teams
• Own parts of the SoC design, including one or more subsystems and full-chip-level design activities
• Plan deliverables in line with overall project deliverables
• Perform design, frontend, DFT, and verification activities across all stages
• Handle chip-level clocking, booting, and low-power design
• Conduct PPA analysis and IP evaluations and selection
• Collaborate with global teams
• Partner with design leads and architects and adhere to best practices
• Contribute to SoC design integration and quality checks
• Own PPA, design constraints, and Lint/CDC activities as applicable
• Work with verification, physical design, DFT, and other functions to achieve production-quality silicon
• Train and mentor fresh engineers
• Build collaboration with R&D team members and leads across Architecture, SoC, and Implementation
• Influence technical strategy and drive innovation in products, technology, and/or patents
• Potentially perform ASIC implementation tasks including synthesis, timing constraints, ECOs, STA, power intent implementation and validation, lint, power analysis, CDC/RDC analysis and validation
• Potentially perform RTL development and physical design activities from floor-plan definition through place and route
• Model and analyze performance, area, power, and system cost tradeoffs for different micro-architectures

Senior System-on-Chip Design Engineer