Lumai

Engineer

• Own signal and power integrity across boards and packages
• Run pre-layout channel studies to set routing topologies, stackups, materials and design constraints for high-speed interfaces
• Carry out post-layout SI analysis of critical channels, including insertion and return loss, crosstalk, and eye and COM analysis using IBIS-AMI models
• Design and optimise vias, breakouts, connector launches, and transitions into optical engines and co-packaged components
• Set PDN impedance targets, design decoupling strategies, and run DC drop and AC PDN analysis for high-current ASIC and FPGA rails
• Support package, interposer and board co-simulation with the ASIC team
• Correlate simulation with lab measurements using TDRs, VNAs and oscilloscopes, and feed results back into models and design rules
• Evaluate and characterise PCB materials, connectors and cable assemblies with suppliers and fabricators
• Build SI/PI methodology, model libraries and reusable design guidelines
• Sign off critical channels on at least one board by month six and determine when layouts are ready to release

Explore Senior HW Engineer – Signal and Power Integrity at Lumai. Review requirements and application details.

Senior HW Engineer – Signal and Power Integrity

Designer

• Design board-level analog and mixed-signal circuits, including photodiode front ends, TIAs, ADC/DAC driver and reconstruction stages, laser drivers, modulator drivers, and bias networks
• Translate photonic system requirements into analog specifications and architectures with photonics and system teams
• Design low-noise power delivery for sensitive circuits, including LDO post-regulation, filtering, precision voltage and current references, grounding, and partitioning schemes
• Design control loops and precision circuits for photonic components, including TEC and temperature control, laser current control, monitor photodiode readout, and heater drivers
• Run SPICE circuit simulation and analysis, including noise, stability, worst-case, and Monte Carlo analysis, and verify performance across corners
• Provide placement, routing, and grounding guidance to the layout engineer
• Review layouts for analog integrity
• Select and qualify analog components through production
• Lead laboratory bring-up and characterisation of analog circuits for noise, bandwidth, linearity, stability, and crosstalk
• Correlate laboratory results with simulation
• Work with the ASIC team on chip-to-board analog interfaces and on-chip versus off-chip analog partitioning
• Agree optical requirements, including optical power budgets, bandwidth, noise, and linearity, with photonics and system teams
• Characterise at least one full analog subsystem on the bench by month six
• Establish layout constraints and test procedures for use by other engineers

Explore Senior HW Engineer – PCB Analog Design at Lumai. Review requirements and application details.