TYLsemi

Artificial Intelligence

• Design and implement high-quality RTL for complex SoC components and subsystems
• Own micro-architecture definition and execution for performance-critical blocks
• Develop designs that scale across IP, subsystem, and full SoC integration
• Integrate and optimize PCIe, CXL, Ethernet, and UCIe high-speed IO protocols
• Ensure timing closure, power efficiency, and area optimization
• Collaborate with architecture, design verification, physical design, and firmware teams
• Drive lint, CDC, RDC, and formal verification quality initiatives
• Support emulation, prototyping, and silicon bring-up
• Contribute reusable design components and IP across multiple programs
• Leverage automation and AI tools to improve RTL productivity and design quality
• Deliver high-quality RTL with minimal re-spins and meet performance, power, and area targets

Principal RTL Designer – SoC, AI, HPC, Networking