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Hardware Engineer, RTL Lead
Normal ComputingCore Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in leading RTL design teams, developing and synthesizing SystemVerilog for complex microarchitectures, and collaborating with cross-functional teams to ensure design integrity and performance. Proficient in managing design methodologies, setting coding standards, and optimizing for timing and area constraints.
Highest-signal resume keywords
RTL Design LeadershipSystemVerilog DevelopmentDebugging and VerificationPhysical Design CollaborationInterface Architecture Experience
About the role
Key responsibilities & impact- Lead and own digital logic design for Normal's thermodynamic hardware
- Write microarchitecture specifications and create synthesizable SystemVerilog
- Work with design verification engineers to test designs using conventional and formal methods
- Collaborate with physical design to meet area and timing constraints
- Help with hiring and refine the design methodology
- Organize the design team around schedules and track progress
- Set standards and expectations for the RTL design team
- Create and enforce RTL coding standards
- Develop RTL across datapath logic, control, and memory interfaces
- Translate high-level specifications into implementable microarchitectures
- Review verification plans, assist with debugging, and help close coverage
- Collaborate on timing closure, PPA optimization, floorplanning constraints, and DFT
- Participate in design reviews and architecture decisions
- Support tapeout preparation, establish tapeout criteria, sign off on tapeout readiness, and support post-silicon bring-up
Requirements
What you’ll need- Experience leading an RTL design team through multiple tapeouts, including block and toplevel work
- Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route for multiple blocks and designs
- Experience with datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront
- Strong debugging instincts across simulation, waveforms, and formal counterexamples
- Ability to work directly with architects and physical designers
- Experience with multiple interface architectures, such as PCIe, Ethernet, and memory devices
- Familiarity with FPGAs
- Experience with AI-assisted RTL or EDA tooling
- Exposure to physical design constraints, floorplanning, or timing-driven RTL development
Benefits
Comp & perks- Hybrid work arrangement
- Inclusive and collaborative work environment
- Reasonable accommodations for individuals with disabilities
ATS Keywords
✓ Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
RTL DesignSystemVerilogMicroarchitecture SpecificationDatapath Logic DevelopmentSynthesisPlace-and-RouteDebuggingTiming ClosurePPA OptimizationFormal Verification
Soft Skills
Team LeadershipOrganizational SkillsCollaborationCommunication
Tools & Technologies
EDA ToolingAI-Assisted RTLFPGAs
Industry Keywords
TapeoutTiming ConstraintsFloorplanningPCIeEthernetMemory Devices