Hardware Engineer

• Lead the design and configuration of GPU servers and rack-scale infrastructure using vendor reference architectures from NVIDIA, AMD, and emerging AI hardware providers
• Partner with ODMs and OEMs to develop, validate, and optimize custom hardware platforms for production deployment
• Own rack-level architecture, including mechanical layout, power distribution, thermal design, cable management, serviceability, and deployment standards
• Evaluate new GPU platforms, server technologies, and hardware innovations for next-generation AI workloads
• Collaborate with data center engineering, networking, infrastructure, and operations teams on facility and production integration
• Balance performance, reliability, manufacturability, scalability, and total cost of ownership
• Support hardware validation, qualification, and production readiness for large-scale deployments
• Establish engineering standards, hardware specifications, and design best practices
• Influence long-term hardware architecture and infrastructure strategy

Principal Hardware Design Engineer

• Build camera systems and on-device software feeding video intelligence products
• Own edge capture devices end to end, from board bring-up and on-device software through fieldable physical form factors
• Perform bring-up and configuration on embedded Linux platforms, including flashing, kernel and device tree configuration, camera module enablement, and driver troubleshooting
• Build and maintain on-device capture pipelines recording synchronized video and audio with sensor telemetry
• Design capture behavior for denied, disrupted, intermittent, and limited-bandwidth environments, including local buffering and store-and-forward delivery
• Integrate and synchronize depth and stereo cameras, inertial measurement units, and positioning receivers
• Convert development kits and off-the-shelf components into fieldable units while addressing enclosure, mounting, power, and thermal constraints
• Produce bills of materials, assembly instructions, and test procedures
• Present design tradeoffs and test results to senior leadership and customer stakeholders
• Collaborate with AI engineers, data engineers, and DevOps engineers supporting federal and defense customers

Senior Embedded Hardware Engineer

• Design and simulate end-to-end systems to meet performance specifications such as range and signal-to-noise ratio
• Design and validate signal-processing algorithms for detection, tracking, RF calibration, and parameter estimation
• Support Matlab/Simulink code generation for signal processing and filtering
• Analyze algorithmic computational complexity and hardware resource needs, including FPGA fabric, memory, and I/O bandwidth
• Work with hardware engineers to drive device selection, including FPGA, ADC/DAC, DDR3/4, and NOR flash
• Support hardware bring-up and design verification alongside electrical engineers
• Implement RTL logic and perform FPGA prototyping
• Develop and optimize radar-system components from early concepts through product specifications and flight-vehicle integration
• Coordinate with the guidance, navigation, and control team, internal stakeholders, adjacent integrated product teams, and suppliers

Lidar FPGA Engineer

• Develop, document, and implement design rules for ultra-high-speed signaling
• Ensure power, performance, and area goals are met for products
• Analyze substrate signal integrity and power integrity
• Collaborate with layout teams to optimize solutions across interposer, substrate, and PCB
• Design, document, and develop ASIC packages for high-volume, high-quality release
• Perform post-layout extraction and reporting
• Collaborate with system partners, vendors, and design leads
• Achieve combined power and signal integrity
• Resolve complex technical issues using advanced technology design rules

ASIC Packaging Signal/Power Integrity Hardware Engineer

• Design high-level system architectures for instruments, including analog and RF front ends, signal conditioning and amplification, DAC and ADC selection, power and clocking schemes, and control and monitoring circuitry
• Lead research, simulation, prototyping, evaluation, and design of high-speed mixed-signal front ends for quantum-computer lasers and actuators
• Collaborate with quantum engineers and other groups to understand system needs and define hardware requirements
• Perform board-level circuit design, schematic capture, and PCB layout in Altium Designer with a PCB layout designer
• Participate in bring-up, verification, and testing of control-system hardware
• Collaborate with FPGA, firmware, and software engineers
• Drive hardware strategy across multiple concurrent projects while remaining engaged in hands-on engineering work
• Report to the Control Systems Manager

Senior Hardware Engineer – High Speed Mixed Signal Designer

• Develop embedded board support packages for Teradyne instruments
• Participate in architecture choices involving processors, operating systems, tools, and network adaptation
• Design, implement, verify, and validate Linux BSPs and userspace tools for automated test equipment in the lab
• Work with Hardware, Software, and Systems Engineering to provide interfaces to complex hardware systems
• Implement scalable, high-performance, high-quality, extensible, and maintainable code
• Build, deploy, and automate testing of created and improved systems

Junior Embedded Firmware Engineer, Compute Test

• Develop embedded board support packages for Teradyne instruments
• Contribute to key architecture choices involving processors, operating systems, tools, and network adaptation
• Architect, design, implement, verify, and validate Linux BSPs and userspace tools in the lab for automated test equipment
• Work with Hardware, Software, and Systems Engineering to provide interfaces to complex hardware systems
• Implement scalable, high-performance, high-quality, extensible, and maintainable code
• Build, deploy, and automate testing of created and improved systems

Embedded Firmware Engineer – Compute Test

• Develop embedded board support packages for Teradyne instruments
• Participate in key architecture choices involving processors, operating systems, tools, and network adaptation
• Architect, design, implement, verify, and perform lab validation of Linux BSP and userspace tools for automated test equipment
• Work with Hardware, Software, and Systems Engineering on interfaces to complex hardware systems
• Implement scalable, high-performance, high-quality, extensible, and maintainable code
• Build, deploy, and automate testing of created and improved systems

Senior Embedded Firmware Engineer, Compute Test

• Lead the full netlist-to-GDSII physical design flow, including floorplanning, power grid design, placement, clock tree synthesis, and place-and-route
• Own static timing analysis, timing constraint creation and validation, and signoff timing closure across operating corners and modes
• Drive physical optimization for power, performance, and area, plus power integrity and crosstalk analysis
• Execute chip/block physical signoff checks, including DRC, LVS, ERC, and antenna fixes, and hand off to the foundry
• Collaborate with RTL, architecture, and DFT teams on floorplanning, macro placement, pin assignments, and physical feasibility
• Create and execute tapeout checklists and manage final stream-out processes
• Support post-silicon physical debugging and bring-up as needed

Hardware Engineer, Physical Design

• Assist with the design and validation of a server subsystem
• Ensure designs meet functional specifications
• Work independently on assigned tasks
• Participate as a team member to deliver quality products on time
• Participate in cross-functional meetings and teams
• Help create functional specifications and technical documentation

Hardware Engineer jobs in United States