Architect jobs in United States

Explore 405 matching jobs.

Normal Computing

Memory Architect

Normal Computing

Posted: 10/22/2026
PythonC++
LMI

Cyber Architect – Clearance Required

LMI

Posted: 10/22/2026
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Mirantis

Consulting Architect

Mirantis

Posted: 10/21/2026
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HNTB

Architectural Designer III

HNTB

Posted: 10/21/2026
Discovery Land Company

Director, Architecture

Discovery Land Company

Posted: 10/21/2026
General Motors

Electrical Subsystem Architect

General Motors

Posted: 10/21/2026
Assembly
Turner & Townsend

Senior Estimator – Data Center Construction, Civil, Structural, Landscaping, Architectural

Turner & Townsend

Posted: 10/21/2026
Woolpert

Architect – Mission Critical

Woolpert

Posted: 10/21/2026
TEKsystems

SailPoint Practice Architect II – IAM

TEKsystems

Posted: 10/21/2026
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DJ&A

Landscape Architect III

DJ&A

Posted: 10/21/2026
AFL

System Architect – DAS, Wireless

AFL

Posted: 10/21/2026
NVIDIA

Power Architect

NVIDIA

Posted: 10/21/2026
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Simple Software Solutions Group, Inc

Senior Tanium Architect – Engineer

Simple Software Solutions Group, Inc

Posted: 10/21/2026
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Salesforce

Field Service Readiness Architect

Salesforce

Posted: 10/21/2026
Cloud
Sigma Systems

Senior Architect – Chat Platform

Sigma Systems

Posted: 10/20/2026
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Bank of America

Architect – AWS

Bank of America

Posted: 10/20/2026
Zscaler

Principal Strategy Architect

Zscaler

Posted: 10/20/2026
Stanley Consultants

Architect

Stanley Consultants

Posted: 10/20/2026
Rivian and Volkswagen Group Technologies

Staff Vehicle Architecture Engineer

Rivian and Volkswagen Group Technologies

Posted: 10/20/2026
Python
BECU

Staff Architect

BECU

Posted: 10/20/2026
AzureCloudMicroservices
Normal Computing

Memory Architect

Normal Computing
Posted 10/22/2026full-timeMountain View • California • United StatesMid-LevelSeniorWebsite
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Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in memory architecture and circuit design, with a strong focus on high-performance compute and memory systems. Proficient in defining and implementing memory interfaces and architectures while collaborating with cross-functional teams to achieve significant performance improvements.

Highest-signal resume keywords
Memory ArchitectureCircuit DesignPython ProgrammingSPICE ModelingRTL and SystemVerilog

Tech Stack

Tools & technologies
PythonC++

About the role

Key responsibilities & impact
  • Lead translation of Thermo In-Memory Computing concepts from theory into silicon
  • Reimagine memory read/write paths, memory-array organization, and microarchitecture interleaving memory operations with high-performance compute
  • Deliver targeted 100–1000× improvements in AI inference performance
  • Report to the Director of Silicon Engineering
  • Partner with scientists, microarchitects, physical design, and analog design engineers
  • Implement a standard cell library combining digital compute primitives with ThermoDRAM compute primitives
  • Translate compute primitives into a high-performance Compute In-Memory System
  • Own technical relationships with major manufacturers from PDK acquisition through test-chip tapeout and production silicon
  • Define processing-in-memory architecture, memory requirements, floorplans, read/write circuitry, and row/column decoders
  • Architect local/global datapaths, segmented buses, and on-die fabrics
  • Own power distribution, power budgets, thermal limits, redundancy, ECC, retention, and yield considerations
  • Own PDK and fab access, design-rule assessment, shuttle tapeout planning, test-chip content, schedule, and bring-up
  • Partner with analog engineers on primitive device libraries and set architectural performance requirements
  • Define custom memory interfaces including SERDES, PCIe, Ethernet, DDR5, LP6, or HBM-class interfaces
  • Oversee SPICE, analytical, and cycle-level performance, power, and yield models
  • Partner with performance and machine learning engineers to validate workload-level gains

Requirements

What you’ll need
  • Substantial experience in memory architecture or circuit design at a memory manufacturer or memory-centric compute company
  • Deep understanding of 1T/3T/6T/8T SRAM cells, DRAM bitcells, capacitance, sensing, read/write operations, core timing, retention, and reliability
  • Hands-on experience with embedded memory or random access memory technology and PDKs
  • Experience developing memory test chips through tapeout
  • Fluency moving between SPICE-level circuit behavior and architecture-level performance and power models
  • Strong fundamentals in Python, C, C++, or another programming language for modeling and performance prediction
  • Experience with RTL and SystemVerilog
  • Experience with memory interface types
  • Excellent written and spoken communication skills

Benefits

Comp & perks
  • Equal Opportunity Employer committed to diversity and inclusion
  • Reasonable accommodations for individuals with disabilities
  • Applicant privacy protections for employment-related personal information

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
1T/3T/6T/8T SRAM CellsDRAM BitcellsEmbedded Memory TechnologyRandom Access Memory TechnologyMemory Test ChipsPerformance PredictionRead/Write OperationsCore TimingRetentionReliability
Soft Skills
Excellent Communication Skills
Tools & Technologies
SPICEPDKSERDESPCIeEthernetDDR5LP6HBM-class Interfaces
Industry Keywords
Thermo In-Memory ComputingCompute In-Memory SystemMemory RequirementsPower DistributionThermal Limits