Engineer jobs in United States

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Cornelis Networks

Senior ASIC Verification Engineer

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Posted: 10/21/2026
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The Aerospace Corporation

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Cornelis Networks

Senior ASIC Verification Engineer

Cornelis Networks
Posted 10/21/2026full-timeRemote • Texas • United StatesSeniorWebsite
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Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in SoC-level verification strategy and UVM/SystemVerilog coding, with a strong focus on functional testing and coverage closure. Proven ability to mentor teams and enhance productivity through AI tools and effective collaboration across multiple engineering disciplines.

Highest-signal resume keywords
UVM/SystemVerilog CodingSoC VerificationFunctional TestingDebugging with VerdiAI Tools Utilization

Tech Stack

Tools & technologies
PerlPythonShell ScriptingSubversionTCP/IP

About the role

Key responsibilities & impact
  • Define the overall SoC-level verification strategy, technical planning, and direction
  • Enable and drive development of UVM environments to verify RTL at block, unit, and SoC levels
  • Develop and execute functional tests according to verification test plans
  • Instrument testbenches for functional and code coverage and drive coverage closure
  • Collaborate with design, software, emulation, system hardware, and silicon validation teams
  • Drive verification closure for entire projects, including design modules, subsystems, and SoCs
  • Provide day-to-day guidance and leadership to team members
  • Drive results through mentoring, coaching, and counseling
  • Educate the team on using AI tools to enhance productivity and efficiency
  • Generate and enforce coding and verification guidelines

Requirements

What you’ll need
  • 8+ years of experience with hands-on writing code using UVM/SystemVerilog
  • Experience verifying complex SoCs with multiple clock and reset domains using VCS or equivalent simulation tools
  • Experience debugging failures to the RTL line, closing bug fixes, and using Verdi or equivalent debug tools
  • Experience in ground-up testbench development
  • Experience with revision control systems such as Git or SVN
  • B.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
  • 8+ years of relevant networking hardware verification experience preferred
  • Proven expertise verifying 50G, 100G, or 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, or IPSec preferred
  • Experience with scripting languages such as TCL, Python, Perl, or Shell scripting preferred
  • Track record of first-pass success in ASIC and systems preferred
  • Experience utilizing AI tools to generate test plans and improve verification productivity highly desirable
  • Ability to reside within the United States

Benefits

Comp & perks
  • Equity, cash, and incentives
  • Health, medical, dental, and vision coverage
  • Disability and life insurance
  • Dependent care flexible spending account
  • Accidental injury insurance
  • Pet insurance
  • Generous paid holidays
  • 401(k) with company match
  • Open Time Off (OTO) for regular full-time exempt employees
  • Sick time
  • Bonding leave
  • Pregnancy disability leave
  • Dynamic, flexible work environment
  • Performance-based incentives, including an annual bonus or sales incentives

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
UVMSystemVerilogVCSVerdiTCLPythonPerlShell ScriptingTestbench DevelopmentNetworking Hardware Verification
Soft Skills
MentoringCoachingCollaborationLeadershipGuidance
Tools & Technologies
GitSVNSimulation ToolsAI Tools
Industry Keywords
Ethernet MAC/PCSTCP/IPRDMA/RoCEIPSecASIC Verification